Denali Software delivers 40/100G Ethernet Verification IP for virtualization, FCoE products

Feb. 18, 2010
The company has introduced its PureSpec-Ethernet verification intellectual property (VIP) product to support the preliminary 40/ 100 -Gigabit specification from the IEEE Ethernet Task Force.

SUNNYVALE, Calif. --Denali Software, Inc. has introduced its PureSpec-Ethernet verification intellectual property (VIP) product to support the preliminary 40/ 100 Gigabit (Gb) specification from the IEEE Ethernet Task Force. The product has been released for delivery to the company's current networking and communication customers for use in deploying next-generation Ethernet products.

The preliminary IEEE specification, which sends Ethernet frames at 40 and 100 gigabits per second, enables developers to take advantage of the increased bandwidth for advanced computing, virtualization, video on demand, Fibre Channel over Ethernet (FCoE), Network-Attached Storage (NAS), VoIP and video surveillance applications.

Denali says its PureSpec- Ethernet VIP product provides a comprehensive coverage of the specification and can be integrated into any verification methodology, thus accelerating the pre-silicon design and verification of a variety of Ethernet devices and systems.

"Our collection of Ethernet VIP offerings have expanded to include support for 40 Gb/s and 100 Gb/s speeds, providing a further incentive to designers that were waiting on the sidelines for the maturation of the P802.3ba specification and ecosystem," states Sanjiv Kumar, director, Verification Products at Denali Software. "Our comprehensive verification platform, experience, and support provide the optimal solution for device and system designers aiming to leverage the increased bandwidth features within the new protocol and develop advanced Ethernet marketplace offerings."

Denali's PureSpec VIP software for the preliminary IEEE P802.3ba specification supports all aspects of the specification including block distribution, lane reordering, alignment insertion, alignment removal, alignment lock per lane, block synchronization per lane, lane deskew, auto-negotiation, as well as the optional sub-layer forward error correction (FEC).

Denali says its PureSpec is among the most widely used verification IP products for verifying compliance and compatibility of Ethernet designs. PureSpec products are directly integrated into popular EDA languages and verification environments including: Verilog, SystemVerilog, VHDL, C/C++, SystemC, 'e', OpenVERA.

Denali will be demonstrating its PureSpec solution for 40/ 100Gb Ethernet (GbE) design at the Ethernet Technology Summit in San Jose, California, on February 24-5, 2010. More information about Denali, its products and services is available at

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